(1) Field of the Invention
The invention relates to a method for optimal source impedance matching at the input of electronic components, particularly transistors.
(2) Prior Art
The electronic components of transistor type are employed in the radio frequency (RF) and hyper frequency (HF) electronic circuits to amplify the power of an input signal.
These components are in principle impedance mismatched. Consequently, if no particular attention is given regarding the introduction conditions of these components in a given electronic circuit, the majority of the incident signal is reflected at the input of the component. This signal will thus not be amplified.
Consequently, it is essential to perform impedance matching of this component input. This is particularly done by matching circuits or tuners. These tuners make it possible to decrease the quantity of reflected signal at the input, and thus to maximize the quantity of inputted signal into the component which will be amplified thereafter. A tuner is a transformer that performs a transition between the characteristic output impedance of the electronic circuit providing the signal to the component and the input impedance of said component.
Thus, a maximized signal transfer requires a prior knowledge of these two impedances. Such maximization brings into play the notions of transducer gain and power gain of the device under testing, hereinafter named DUT. The power gain is the ratio between the output power provided to the load and the output capacity injected at the input of the DUT. The transducer gain is the ratio between the output power provided to the load and the available gross power at the input of the DUT originating from the source. Thus, the power gain corresponds to the transducer gain when the power transfer at the input is maximal, namely, when the impedance matching is achieved between the DUT and the source. All the available power at the source is transferred and injected in the DUT.
The knowledge of impedances is reached based on power measurements usually carried out by bolometers connected to the circuit by means of measurement couplers. To gain access to this information, the measurement benches used implement input and output impedance tuners of the DUT, and input couplers either upstream or downstream from the input tuner.
The technique of general reference, so-called “source pull”/“load pull” (from the source/from the load) is illustrated respectively in FIGS. 1a and 1b, brings in to play input couplers, 10 and 12, for measuring incident and reflected signals at the input of the DUT (here a transistor), respectively in upstream and downstream configuration of the input tuner 14 in a measurement bench B. An outer power supply 2 makes it possible to supply current and voltage via Bias tees, 3 and 4 on both sides of the DUT when the DUT does not have inner bias circuits (which is the case for a transistor). The same references designate the same elements of FIGS. 1a and 1b. Such techniques are described for example in patent documents U.S. Pat. No. 7,248,866, CA 2558861 and CA 2549698.
With reference to FIG. 1a, the input tuner 14 varies the impedance provided by source 1 at the DUT input. This impedance is then adjusted by adjusting an optimal source impedance at the input of the DUT in order to minimize the reflected power and thus to maximize the transducer power gain. The optimization is obtained from the ratios of reflected power measurements, carried out by a bolometer 12b connected to the input coupler 12 measuring the reflected signal, to the measurements of incident power carried out by a bolometer 10b connected to the coupler 10 measuring the incident signal.
In “load pull” measurement, the technique is similarly applied at the output: it consists in varying the load impedance provided at the output of the DUT by means of an output tuner 16. The load impedance is thus optimized using the output tuner at the output of the DUT in order to maximize the output power. The optimization results from the maximization of the transducer power gain.
The input and output tuners are mechanical tuners driven by stepping motors and for carrying out an automatic search of the optimal matching conditions. They are pre-calibrated and, for each adjustment, an integrated memory makes it possible to know the losses and impedances of these tuners with respect to the signals and micro-waves used.
When the input 10, 12 and output 22, 24 couplers are in downstream configuration from the input 14 and output 16 tuner (FIG. 1b), the impedances are—module and phase-measured at the input and output of the DUT by a vector network analyzer 20. This analyzer is connected to bench B by input couplers 10 and 12 and by output couplers 22 and 24 by means of incident and reflected coupled channels respectively V1 and V3, V2 and V4.
After calibration, the vector network analyzer 20 thus makes it possible to derive the incident power, the reflected power at the input of the DUT as well as the output power provided to the load. In upstream configuration, this power is measured by a bolometer 17 at the output of tuner 16.
The techniques mentioned are useful when the DUT is directly subjected to a power signal from the source 1, as the applied power level thus influences the determination of the optimal impedances.
However, these test techniques are no longer useful when the DUT is operating in linear conditions: in this case, the determination of the conditions may be carried out based on weak signal measurements in terms of power by a known formalism of S-parameter type.
With respect to the upstream configuration, the downstream configuration makes it possible to avoid a delicate prior calibration of the tuners, the impedance values being directly known by the vector network analyzer 20. The calibration of the tuners is delicate as it is linked to the mechanical repeatability of the mobile elements of the tuner, and to the mechanical stability of the arrangement carried out for the test.
The main problem pertains to the circuit losses present between the DUT and the tuners. In fact, it is sometimes necessary to place devices between these two elements, such as adaptors, cables or Bias tees 3 and 4 (see FIGS. 1a and 1b) allowing to couple a continuous signal and an alternating signal. The latter elements are essential when the DUT does not have inner bias circuits. In this case, the power supply of the DUT is done by means of these outer bias circuits.
The major drawback of the downstream configuration is that it increases the signal losses between the tuners and the DUT, owing to the presence of measurement couplers: the impedance area that may be used is thus substantially reduced at the DUT plane as, due to additional power losses in these elements, the so-called optimal impedances cannot always be synthesized. Generally, the greater the power losses between the tuner and the DUT, the more restrained the impedance area able to be synthesized will be which results in a misrecognition of the DUT optimal performances as the optimization achieved with tuners is not maximized.
These losses thus limit the impedance range that could be exhibited. This is linked to the energy losses in the Bias tees, the couplers, the cables or adaptors located between the DUT and the impedance tuners.
In order to remedy to this problem, it has been proposed to use tuners capable of intrinsically synthesizing a wide range of impedances, either by improving the mechanical characteristics of the tuners, or by associating the latter with active electronic elements. Patent document U.S. Pat. No. 7,053,628 cites these types of means.
Another solution consists in placing between the DUT and the tuners, circuits having the lowest possible losses as described in patent document US 2003107363 or U.S. Pat. No. 6,414,563. These solutions do not permit solving the above problem satisfactorily.